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The GE IS200TBCIH1BBC, also cataloged as the IS200TBCIH1BBC contact input terminal board, operates as a dedicated hardware component for dry‑contact state acquisition within Mark VI control racks.
| Parameter | Specification |
|---|---|
| Model | IS200TBCIH1BBC |
| Brand | General Electric |
| Origin | USA |
| Weight | Not specified |
| Dimensions | 33.02 cm × 10.16 cm |
| Operating Temp | -30 to 65 deg C |
| Power Consumption | Not specified |
| Input Channels | 24 dry contact inputs |
| Excitation Voltage | Routed through JE1 / JE2 plugs |
| Connectors | JR1 (simplex), JR1/JR2/JR3 (TMR) |
| Noise Suppression | Surge and high‑frequency filtering |
| Series | Mark VI |
| Product Type | Contact Input Terminal Board |
In Mark VI and Mark VIe architectures, the board aligns with GE backplane bus communication velocity limits and deterministic Ethernet‑based I/O pack timing. When used with side‑mounted I/O packs, contact state updates propagate through fixed‑cycle Profinet / EtherNet/IP paths. Firmware flash compatibility ensures that pack updates do not disturb established contact excitation wiring or input‑state validation logic. I/O density scaling remains consistent across simplex and TMR configurations.
Q: Can the IS200TBCIH1BBC be inserted or removed while the rack is energized? A: The board is not designed for hot‑swap. Removal or insertion should only occur when the associated rack segment is de‑energized to avoid transient loading on the backplane.
Q: How does the board behave if excitation voltage becomes unstable? A: If excitation voltage drops significantly, the I/O pack detects the condition and latches a diagnostic alarm. Input channels may be forced into a fail‑safe state depending on configuration.
Q: What occurs during TMR mismatch conditions? A: In TMR mode, if the board’s input value does not match the voted value from all three channels, a fault is generated to indicate a discrepancy.
Terminate shields at the designated grounding points near the terminal blocks to minimize induced noise.
Route dry‑contact wiring separately from high‑current conductors to reduce susceptibility to surge interference.
Verify excitation voltage routing through JE1 and JE2 before landing field wiring.
Ensure molded‑plug cables are fully seated when connecting to VCCC or VCRC processor boards.
In TMR systems, confirm all three JR connectors are engaged to maintain correct R/S/T voting behavior.

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