The GE Multilin L90A00HCHF8AH6UL6UN6CS6UU6CW2A, also cataloged as the L90 Line Current Differential Relay, operates as a dedicated hardware component for high-speed line current differential protection across transmission lines and cables. The microprocessing platform executes phase-segregated calculation matrices natively at the hardware tier to drive single-pole and three-pole tripping sequences over multi-terminal overhead and underground electrical grids.
Hardware Specifications
Parameter
Specification
Model
L90A00HCHF8AH6UL6UN6CS6UU6CW2A
Brand
GE Multilin
Series
UR (Universal Relay) Platform
Origin
Canada / United States
Weight
Standard multi-slot rack-mountable sub-assembly mass
Standard industrial unventilated control cabinet tolerances
Power Consumption
Regulated inner logic draw from integrated control power module
Communication Interfaces
Three independent Ethernet ports, specialized inter-relay fiber links
Time Synchronization
1 microsecond accuracy via LAN with IEEE 1588 support
Synchrophasor Compliance
Integrated PMU functionality conforming to IEEE C37.118 and IEC 61850
Protection Elements
5-zone phase and ground distance, adaptive restraint differential
Product Type
Protection Relays
Industrial Control & Drive Interface
Profinet / EtherNet/IP Deterministic Network Telemetry The relay architecture incorporates three independent Ethernet ports configured to manage simultaneous network connections over distinct protocol layers. The internal hardware processes real-time IEC 61850 configuration frames and broadcasts high-speed GOOSE transmissions directly to deterministic industrial networks, isolating transient power grid disruptions from core monitoring paths.
Backplane Bus Communication Velocity and Synchronized Sampling The internal processing substrate executes hardware-level synchronized sampling routines across all local and remote relay channels concurrently. By applying dynamic charging current and channel asymmetry compensation natively across the high-speed backplane tracks, the relay balances sensitivity for internal faults with data security for external faults without introducing processing lag.
