GE DS200SDCCG1AEC Mark V Series Drive Control Boards

The General Electric DS200SDCCG1AEC, also cataloged as the DS200SDCCG1 Drive Control Board, serves as the primary processing component for the Mark V turbine control system, executing high-speed logic for drive assembly management.

Hardware Specifications

Industrial Control and Network Execution

• Backplane Bus Communication Velocity: The board integrates with the Mark V backplane to manage deterministic data exchange at high speeds. It utilizes three onboard microprocessors with shared RAM, requiring precise synchronization for turbine management tasks. Firmware flash compatibility is strictly bound to the revision history of the Mark V rack software.
• Profinet / EtherNet/IP Deterministic Networks: While operating on native Mark V protocols, the control architecture supports the deterministic packet timing necessary for integrated turbine drive loops, maintaining sub-millisecond response for critical speed and fuel flow feedback.
• I/O Density Scaling: The SDCC design supports complex sensor termination matrices. Configuration is managed via board-level berg-type jumpers (JP nomenclature) and wire jumpers (WJ nomenclature), allowing for hardware scaling tailored to specific gas, steam, or wind turbine applications.

Frequently Asked Questions

Q: How can the DS200SDCCG1AEC be reset in the field?

A: The board supports four reset methods: manual activation of the onboard RESET pushbutton, application of +5 to +24 VDC to customer interface points on the STBA or NTB/3TB terminal boards, programmatic software-generated resets, or automatic resets triggered by the internal hardware watchdog circuit.

Q: How are fault codes interpreted via the onboard LED array?

A: The board features ten diagnostic LEDs arranged in a row. A sequential flashing pattern indicates nominal operation. Error codes 1 to 399 are signaled by a slow blink rate, while error codes 400 to 1023 are signaled by a faster blink rate. Codes are displayed in either BCD or binary formats depending on the specific fault type.

Field Installation Guidelines

• Static Discharge Mitigation: The DS200SDCCG1AEC is highly sensitive to electrostatic discharge. Technicians must utilize a verified, grounded ESD wrist strap and handle the PCB only by the edges or dedicated extraction points to prevent damage to the internal microprocessors.
• Diagnostic Probe Usage: Utilize only calibrated, approved testing equipment on the metal post test points. Ensure that all probes are properly grounded to the rack chassis to prevent voltage injection into the backplane logic.
• Jumper Configuration: Refer to the layout diagram in manual GEI-100029 before adjusting any JP or WJ jumpers. All configurations must be documented in the system maintenance log, as incorrect jumper settings can lead to unexpected control behavior or drive failure.