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GE 750-P5-G5-S1-HI-A20-R-E SR750 Series Feeder Management Relay
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- Part Number: 750-P5-G5-S1-HI-A20-R-E
- Brand: GE Fanuc
- Type: SR750 Series Feeder Management Relay
- Dimensions: 2.1x18.6x26.3cm
- Country of Origin: USA
- Barcode: 8537101190
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Additional Specifications
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Product Description
The GE Multilin 750-P5-G5-S1-HI-A20-R-E, also cataloged as the 750 Feeder Management Relay, operates as a dedicated hardware component for high-speed electrical fault detection within medium-voltage substation distribution networks. The device reads multi-channel current and voltage variables, executing localized overcurrent, ground fault, and phase imbalance protection algorithms to command breaker trip routing under abnormal line conditions.
Hardware Specifications
| Parameter | Specification |
|---|---|
| Model | 750-P5-G5-S1-HI-A20-R-E |
| Brand | GE Multilin (General Electric) |
| Series | SR750 Feeder Management Relay Series |
| Origin | United States / Canada |
| Weight | Standard SR750 horizontal drawout chassis profile |
| Dimensions | Standard compact rack-mount panel envelope |
| Operating Temp | Standard substation panel environment limits |
| Power Supply | High-range (HI) internal control power block |
| Phase Current Inputs | Three-channel 5 A nominal transformer inputs |
| Ground Current Input | One-channel 1 A zero-sequence transformer link |
| Voltage Inputs | 100-120 VAC nominal range via voltage transformers |
| Analog Outputs | Eight channels of isolated 4-20 mA current loops |
| Digital Outputs | Multiple Form-A and Form-C electromechanical relay contacts |
| Protection Schemes | Phase overcurrent, ground fault, negative sequence, undervoltage, overvoltage |
| Control Logic | FlexLogic programmable internal configuration arrays |
| Local Interface | Enhanced front-panel display matrix with integrated keypad |
Backplane Bus Communication Velocity and Processing
The feeder protection assembly utilizes high-density internal bus traces to maintain deterministic microsecond communication cycles across all sensing and execution sub-modules. Hardware timing circuits dictate that physical current and voltage signals are processed through active analog-to-digital converters, matching the firmware flash compatibility criteria of the core SR750 CPU matrix. This configuration maintains immediate logic resolution under maximum line fault spikes, ensuring that the internally calculated overcurrent tripping sequences broadcast to output contacts without encountering bus bottlenecks.
Frequently Asked Questions
Q: How does the ground fault input profile of the 750-P5-G5-S1-HI-A20-R-E differ from standard 5 A models?
A: This specific module configuration features a sensitive 1 A zero-sequence ground current input channel instead of the standard 5 A interface. This lower nominal range enables increased processing resolution and selective fault detection on low-impedance or grounded distribution lines prone to minor earth leakages.
Q: Can the internal protection and trip parameters be updated online without disrupting active monitoring?
A: No. Altering critical protection setpoints or updating firmware flash profiles requires the system to be put into configuration mode. To prevent accidental tripping or loss of protection during parameters updates, the relay should be isolated from the live breaker tripping matrix.
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